| Issue |
J. Phys. Colloques
Volume 49, Number C4, Septembre 1988
ESSDERC 8818th European Solid State Device Research Conference |
|
|---|---|---|
| Page(s) | C4-311 - C4-314 | |
| DOI | https://doi.org/10.1051/jphyscol:1988465 | |
ESSDERC 88
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-311-C4-314
DOI: 10.1051/jphyscol:1988465
Siemens AG, Central Research and Development, Microelectronics, Otto-Hahn-Ring 6, D-8000 München 83, F.R.G.
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-311-C4-314
DOI: 10.1051/jphyscol:1988465
CHARACTERIZATION OF FIELD-OXIDE-TRANSISTOR-INSTABILITIES CAUSED BY SOG-PLANARIZATION
B. VOLLMER, G. RÖSKA et J. WINNERLSiemens AG, Central Research and Development, Microelectronics, Otto-Hahn-Ring 6, D-8000 München 83, F.R.G.
Abstract
A spin-on-glass planarization process in multilevel metallization can cause instabilities of metal-2-gate field oxid transistors. The threshold voltage shift of a p-channel transistor is reduced for negative gate bias and it can be accelerated by gate bias and temperature. The threshold voltage shift is caused by a thermally activated and field enhanced diffusion process. The planarization process leaves SOG inclusions, but the instabilities are also observed in strcutres where no inclusions are present.