| Numéro |
J. Phys. Colloques
Volume 49, Numéro C4, Septembre 1988
ESSDERC 8818th European Solid State Device Research Conference |
|
|---|---|---|
| Page(s) | C4-109 - C4-112 | |
| DOI | https://doi.org/10.1051/jphyscol:1988423 | |
ESSDERC 88
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-109-C4-112
DOI: 10.1051/jphyscol:1988423
Siemens AG, Corporate Research and Development, Otto-Hahn-Ring 6, D-8000 München 83, F.R.G.
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-109-C4-112
DOI: 10.1051/jphyscol:1988423
SHALLOW DOPING PROFILES FOR HIGH-SPEED BIPOLAR TRANSISTORS
K. EHINGER, H. KABZA, J. WENG, M. MIURA-MATTAUSCH, I. MAIER, H. SCHABER et J. BIEGERSiemens AG, Corporate Research and Development, Otto-Hahn-Ring 6, D-8000 München 83, F.R.G.
Abstract
Within the framework of a double polysilicon self-aligned bipolar technology shallow base widths WB for npn transistors were obtained by low-energy implantation of boron into either crystalline Si (WB = 150 nm), preamorphized Si (WB = 125 nm) or by diffusing boron out of polysilicon (WB= 85 nm). Rapid thermal processing was used for the emitter drive-in. A transit frequency of 22 GHz was achieved for WB = 85 nm. Comparison with one-dimensional calculations indicates the potential of further enhancement of intrinsic device speed by optimization of the proposed technological approaches.