| Issue |
J. Phys. Colloques
Volume 49, Number C4, Septembre 1988
ESSDERC 8818th European Solid State Device Research Conference |
|
|---|---|---|
| Page(s) | C4-809 - C4-812 | |
| DOI | https://doi.org/10.1051/jphyscol:19884170 | |
ESSDERC 88
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-809-C4-812
DOI: 10.1051/jphyscol:19884170
1 Dipartimento di Elettronica ed Informatica, Universita' di Padova, Via Gradenigo 6a, I-35131 Padova, Italy
2 Dipartimento di Elettrotecnica ed Elettronica, Universita'di Bari, Via Re David 200, I-70125 Bari, Italy
3 Tecnopolis CSATA, Str. Prov. per Casamassima km 3, I-70010 Valenzano (Bari), Italy
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-809-C4-812
DOI: 10.1051/jphyscol:19884170
CHARACTERIZATION OF ANOMALOUS LATCH-UP EFFECTS BY MEANS OF INFRARED MICROSCOPY AND SPICE SIMULATION
C. CANALI1, F. CORSI2, M. MUSCHITIELLO3, M. STUCCHI3 et E. ZANONI21 Dipartimento di Elettronica ed Informatica, Universita' di Padova, Via Gradenigo 6a, I-35131 Padova, Italy
2 Dipartimento di Elettrotecnica ed Elettronica, Universita'di Bari, Via Re David 200, I-70125 Bari, Italy
3 Tecnopolis CSATA, Str. Prov. per Casamassima km 3, I-70010 Valenzano (Bari), Italy
Abstract
Anomalous effects have been evidentiated during pulsed I/O overvoltage tests, such as "window effects", i.e. disappearing of the latch-up condition for high I/O injected current. Infrared microscopy observation reveals that anomalous effects are due to the dynamic redistribution of supply current between different latch-up paths. This analysis is confirmed by the SPICE simulation of the lumped equivalent circuit of a CMOS output comprising two coupled pnpn parasitic structures.