| Numéro |
J. Phys. Colloques
Volume 49, Numéro C4, Septembre 1988
ESSDERC 8818th European Solid State Device Research Conference |
|
|---|---|---|
| Page(s) | C4-533 - C4-536 | |
| DOI | https://doi.org/10.1051/jphyscol:19884111 | |
ESSDERC 88
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-533-C4-536
DOI: 10.1051/jphyscol:19884111
Plessey Research Caswell Ltd., Caswell, Towcester, GB-Northants NN12 8EQ, Great-Britain
18th European Solid State Device Research Conference
J. Phys. Colloques 49 (1988) C4-533-C4-536
DOI: 10.1051/jphyscol:19884111
A SUB-MICRON CMOS PROCESS EMPLOYING TRENCH ISOLATION
M.C. ROBERTS, P.H. BOLBOT et D.J. FOSTERPlessey Research Caswell Ltd., Caswell, Towcester, GB-Northants NN12 8EQ, Great-Britain
Abstract
A high density trench isolated CMOS process has been developed. Circuit designs have been initially fabricated at 1µm dimensions. Excellent device performance is demonstrated at channel lengths of 0.7µm and channel widths of 0.2µm showing the potential for fabricating circuits with 0.7µm and 0.5µm design rules.