Numéro
J. Phys. Colloques
Volume 49, Numéro C4, Septembre 1988
ESSDERC 88
18th European Solid State Device Research Conference
Page(s) C4-195 - C4-198
DOI https://doi.org/10.1051/jphyscol:1988440
ESSDERC 88
18th European Solid State Device Research Conference

J. Phys. Colloques 49 (1988) C4-195-C4-198

DOI: 10.1051/jphyscol:1988440

A FULLY CHARACTERISED PROCESS FOR TITANIUM SILICIDE BY RTA FOR ONE MICRON CMOS

N.F. STOGDALE

Plessey Research Caswell Ltd., Caswell, Towcester. Northants., GB-NN12 8EQ, Great-Britain


Abstract
A fully characterised process for self-aligned titanium silicide by RTA is described. Factors influencing formation ; surface pre-clean, time-temperature schedules and ambient choice are all discussed. The sensitivity of the formation process to implanted arsenic is also described and a model presented for this effect. The technique is proven by its inclusion in a one-micron trench isolated CMOS process schedule and electrical results for devices and circuits thus fabricated are presented.