Numéro
J. Phys. Colloques
Volume 43, Numéro C5, Décembre 1982
Colloque International sur l'Epitaxie des Semiconducteurs / Epitaxial Growth of Semiconductor Material
Page(s) C5-173 - C5-173
DOI https://doi.org/10.1051/jphyscol:1982520
Colloque International sur l'Epitaxie des Semiconducteurs / Epitaxial Growth of Semiconductor Material

J. Phys. Colloques 43 (1982) C5-173-C5-173

DOI: 10.1051/jphyscol:1982520

SILICON MODULATION DOPING STRUCTURES USING MULTI-STEP MOLECULAR BEAM EPITAXY AND ION IMPLANTATION

T. de Jong, W.A.S. Douma et F.W. Saris

FOM-Institute for Atomic and Molecular Physics, Kruislaan 407, 1098 SJ Amsterdam, The Netherlands


Abstract
Modulation doped silicon structures have been grown using ultra-highvacuum molecular beam epitaxy (MBE) and ion implantation sequentially. Silicon (100) samples were implanted with As, Ga and B, after which they were introduced in a Si-MBE apparatus. We used conventional thermal annealing (sometimes combined with ion sputtering) as well as pulsed laser irradiation to remove the implantation damage and to prepare substrate surfaces in such a way that epitaxial growth can be achieved. Auger electron spectroscopy (AES) and low energy electron diffraction (LEED) were used to monitor surface conditions prior to growth. Epitaxial layers of thicknesses of 200-1000 Å were grown in ultrahigh vacuum conditions. LEED analysis of the epitaxial layer surface showed that the layer structural quality is improving as a result of epitaxial growth (this was confirmed with Rutherford backscattering and channeling). By repeating the implantation-growth cycle several times, i.e. implanting the MBE-grown samples and growing another epitaxial overlayer on top, modulation doped structures were formed. On a number of these structures electrical measurements were performed to characterize layer quality. We compare substrate surface conditions (structural, composition), growth conditions and the results of electrical measurements and RBS/channeling in order to understand the growth mechanisms involved and to optimize the conditions to manufacture advanced silicon devices.