Numéro
J. Phys. Colloques
Volume 49, Numéro C4, Septembre 1988
ESSDERC 88
18th European Solid State Device Research Conference
Page(s) C4-495 - C4-498
DOI https://doi.org/10.1051/jphyscol:19884102
ESSDERC 88
18th European Solid State Device Research Conference

J. Phys. Colloques 49 (1988) C4-495-C4-498

DOI: 10.1051/jphyscol:19884102

RELIABILITY ASPECTS OF VLSI METALLISATION WITH DIFFUSION BARRIERS

G. RÖSKA et F. NEPPL

Siemens AG, Corporate Research and Development, Microelectronics, Otto-Hahn-Ring 6, D-8000 München 83, F.R.G.


Abstract
In this work we show the necessity of diffusion barriers for scaled VLSI and investigate the resulting changes of reliability risks. Accelerating stress tests at relevant test structures are presented and discussed in detail.