EFFECTS OF GROWTH CONDITIONS ON DEEP-LEVEL DEFECTS IN VPE AND LPE GaAs

Abstract
Studies of the deep-level defects in the VPE and LPE GaAs layers under various growth conditions have been made in this work, using DLTS and C-V techniques. In the VPE grown GaAs, characterization of grown-in defects vs. Ga/As ratio (i.e., 2/1, 3/1, 4/1, and 6/1) were made on GaAs layers grown on <100>, <211A>, and <211B> substrates. The two common electron traps observed in these samples were due to the EB-4 (i.e., E_c -0.71 eV) level and the EL-2 (i.e., E -0.83eV) level. The density of these two electron traps was found to depend on the stoichiometry as well as substrate orientation. For examples, in the <211> orientation samples, the density of EL2 was found to decrease with increasing Ga/As ratio (e.g., N_T = 1.2x10¹⁴cm^-3 for Ga/As = 2/1, and reducing to 5.4x10¹¹ cm^-3 for Ga/As = 6/1). A similar result was also observed in the EB-4 electron trap. Low temperature (230°C) thermal annealing and recombination enhanced annealing studies on these samples showed significant reduction in the density of EB-4 trap and slight reduction in EL-2 trap density. For the LPE grown GaAs layers, two growth temperatures (700 and 800°C) and two temperature dropping rates (l°C/min. and 0.4°C/min.) were used. The DLTS and C-V measurements were made on these samples, and the results showed that only EB-4 electron trap (i.e., E_c-0.71 eV) was observed in the LPE GaAs samples with 1°C/min. dropping rate. Details of our DLTS analysis of the grown-in defects vs. growth conditions in both LPE and VPE grown GaAs layers will be discussed in this paper.